km_kpv_eraser

Erase one KPV key slot with pseudo-random data when its CTRL erase bit is asserted.

An FSM walks the WORDS_PER_SLOT (16 by default) words of the selected slot, emitting a logical {slot, word} address and a pseudo-random data word sourced from a maximal-length LFSR (prim_lfsr, GAL_XOR). The parent (km_kpv) routes these through the shared KPV scrambler, when enabled, and into the key register file, so the slot is overwritten with random data. A one-cycle erase_done pulse accompanies the last word write; km_kpv then clears the self-clearing erase bit and either frees an unsealed slot by clearing its lock bits or retires a sealed slot by setting lock_use.

Multiple pending erase requests are serviced sequentially, lowest slot index first. Erase is intentionally not gated by the slot lock_write/lock_use bits.

The LFSR is seeded to all-ones on cold reset only (no warm reset); the exact seed value is not security-relevant.

Parameters

Table 1. Parameters
NameTypeDefaultDescription
NUM_SLOTSint unsigned64Number of key slots.
WORDS_PER_SLOTint unsigned16Key-data words in each slot; one erase writes word indices 0 to WORDS_PER_SLOT - 1.
DATA_WIDTHint unsigned32Key-data word width; also sizes the LFSR.

Ports

Table 2. Ports
NameDirectionTypeDescription
clk_iinputlogicSystem clock.
cold_rst_niinputlogicCold reset (AASD); seeds LFSR all-ones and returns the FSM to idle.
erase_req_iinputlogic [NUM_SLOTS-1:0]Per-slot erase requests (CTRL[i].erase.value).
wr_en_ooutputlogicRegister-file write stream enable (logical address; parent applies the scrambler).
wr_slot_ooutputlogic [$clog2(NUM_SLOTS)-1:0]Write stream: logical slot index being erased.
wr_word_ooutputlogic [$clog2(WORDS_PER_SLOT)-1:0]Write stream: word index within the slot.
wr_data_ooutputlogic [DATA_WIDTH-1:0]Write stream: pseudo-random data from the LFSR.
erase_done_ooutputlogic [NUM_SLOTS-1:0]One-cycle pulse per slot when its erase completes (last word written).
busy_ooutputlogicHigh while an erase is in progress; the parent gives this priority on the shared scrambler / regfile write port.