efuse_read_interface

Read fuse words through the fuse-command interface with timeouts and sticky errors.

read_go_i starts a read from read_addr_i; read_back_data_o captures the response. read_addr_oob_i is computed upstream against the full-width CSR field because casting to efuse_addr_t truncates upper bits. A start that secure_tm_blocked_i or read_locked_i refuses completes with an error without issuing a command; a lock refusal also pulses read_blocked_o. An outstanding read ends with an error on efuse_req_err_i, a bad bank response or the optional read_req_timeout_*. Sticky address errors clear with read_addr_error_clear_i.

Ports

Table 1. Ports
Name	Direction	Type	Description
`clk_i`	input	`logic`	System clock.
`rst_ni`	input	`logic`	Active-low asynchronous reset.
`test_en_i`	input	`logic`	DFT test enable; not used in this module.
`read_enable_i`	input	`logic`	Read operations allowed; a start while low completes immediately with an error.
`read_locked_i`	input	`logic`	read_addr_i is read locked; a start then completes with an error.
`read_blocked_o`	output	`logic`	One-cycle pulse when read_locked_i refuses a start.
`read_addr_i`	input	`efuse_addr_t`	Fuse bit address to read, sampled on a start.
`read_go_i`	input	`logic`	Starts a read operation when high in the idle state.
`read_busy_o`	output	`logic`	High while a read operation waits for its response.
`read_done_o`	output	`logic`	Set when the last read operation completed; cleared by the next start.
`read_error_o`	output	`logic`	Set when the last read operation failed: rejected, blocked, errored by the bank, or timed out.
`read_back_data_o`	output	`efuse_data_t`	Data word from the last read; zero after an out-of-bounds, refused, errored or timed-out read, and unchanged when a start is rejected because read_enable_i is low.
`read_addr_oob_i`	input	`logic`	High when the full-width CSR read address is beyond the fuse array; a start is then rejected.
`read_addr_error_o`	output	`logic`	Sticky out-of-bounds read address error.
`read_addr_error_clear_i`	input	`logic`	Clears the sticky address error; a same-cycle new error takes priority.
`efuse_req_err_i`	input	`logic`	Guard lock error; ends an outstanding read with an error.
`secure_tm_blocked_i`	input	`logic`	Guard secure-test-mode block; refuses a start with an error but does not end a read already issued.
`read_req_timeout_en_i`	input	`logic`	Enables the response timeout for read operations.
`read_req_timeout_cycles_i`	input	`logic [27:0]`	Response timeout in clock cycles.
`fuse_command_req_o`	output	`fuse_command_req_t`	Read command to the guard; valid only while waiting for the response.
`fuse_command_resp_i`	input	`fuse_command_resp_t`	Filtered response to the read command.
`is_read_timeout_debug_o`	output	`logic`	One-cycle pulse when a read operation times out.