entropy_decorrelator

Decorrelate and downsample ring-oscillator noise into masked entropy bytes.

Feeds noise through a prime-length delay chain (default LENGTH 29) and emits one byte every sample_clk_div_i+1 cycles. sample_clk_div_i is one less than the division factor (counts down through 0 inclusive).

Controls:

LFSR_MODE is declared but not read; the feedback is always prime-length.
bypass_i breaks the feedback path for raw-output testing.
byte_mask_i masks the emitted byte.

entropy_byte_valid_o deasserts whenever enable_i is low so stale data cannot overflow the downstream FIFO.

Parameters

Table 1. Parameters
Name	Type	Default	Description
`LENGTH`	`int unsigned`	`29`	Decorrelator delay-chain length.
`CLKDIV_WIDTH`	`int unsigned`	`24`	Downsample divider counter width.
`LFSR_MODE`	`bit`	`1'b0`	Intended to select LFSR rather than prime-length feedback; the feedback logic does not read it.

Ports

Table 2. Ports
Name	Direction	Type	Description
`clk_i`	input	`logic`	System clock.
`rst_ni`	input	`logic`	Active-low asynchronous reset.
`enable_i`	input	`logic`	Enables shifting and sampling; while low the chain holds and the divider reloads from sample_clk_div_i.
`noise_i`	input	`logic`	Synchronized ring-oscillator noise bit shifted into the delay chain each clk_i cycle.
`bypass_i`	input	`logic`	High removes the XOR feedback so raw noise shifts through the chain unmixed.
`byte_mask_i`	input	`logic [7:0]`	AND mask applied to each emitted byte; a clear bit forces that output bit to zero.
`sample_clk_div_i`	input	`logic [CLKDIV_WIDTH-1:0]`	Downsample period minus one, in clk_i cycles between emitted bytes.
`entropy_byte_sample_o`	output	`logic [7:0]`	Masked top eight delay-chain stages, held until the next sample.
`entropy_byte_valid_o`	output	`logic`	Single-cycle strobe marking a new entropy_byte_sample_o; low while enable_i is low.