OCAH4CORECluster_DigitalTop
Generated by CIRCT.
Ports
| Name | Direction | Type | Description |
|---|---|---|---|
rom_intf_req | output | chipyard_4core_mem_pkg::rom_tilelink_req_t | |
rom_intf_rsp | input | chipyard_4core_mem_pkg::rom_tilelink_rsp_t | |
scratch_ram_intf_req | output | chipyard_4core_mem_pkg::scratch_ram_req_t | |
scratch_ram_intf_rsp | input | chipyard_4core_mem_pkg::scratch_ram_rsp_t | |
l1_icache_tag_intf_req | output | chipyard_4core_mem_pkg::l1_icache_tag_req_t | |
l1_icache_tag_intf_rsp | input | chipyard_4core_mem_pkg::l1_icache_tag_rsp_t | |
l1_icache_data_intf_req | output | chipyard_4core_mem_pkg::l1_icache_data_req_t | |
l1_icache_data_intf_rsp | input | chipyard_4core_mem_pkg::l1_icache_data_rsp_t | |
l1_dcache_tag_intf_req | output | chipyard_4core_mem_pkg::l1_dcache_tag_req_t | |
l1_dcache_tag_intf_rsp | input | chipyard_4core_mem_pkg::l1_dcache_tag_rsp_t | |
l1_dcache_data_intf_req | output | chipyard_4core_mem_pkg::l1_dcache_data_req_t | |
l1_dcache_data_intf_rsp | input | chipyard_4core_mem_pkg::l1_dcache_data_rsp_t | |
o_io_errors_uncorrectable_valid | output | logic [4-1:0][1-1:0] | |
o_uncorrectable_2 | output | logic [32-1:0][1-1:0] | |
o_wb_pc_valid | output | logic [4-1:0][1-1:0] | |
o_wb_reg_pc | output | logic [4-1:0][58-1:0] | |
auto_chipyard_prcictrl_domain_resetSynchronizer_in_member_allClocks_uncore_clock | input | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_chipyard_prcictrl_domain_resetSynchronizer_in_member_allClocks_uncore_reset | input | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_chipyard_prcictrl_domain_resetSynchronizer_in_member_allClocks_core_3_clock | input | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_chipyard_prcictrl_domain_resetSynchronizer_in_member_allClocks_core_3_reset | input | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_chipyard_prcictrl_domain_resetSynchronizer_in_member_allClocks_core_2_clock | input | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_chipyard_prcictrl_domain_resetSynchronizer_in_member_allClocks_core_2_reset | input | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_chipyard_prcictrl_domain_resetSynchronizer_in_member_allClocks_core_1_clock | input | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_chipyard_prcictrl_domain_resetSynchronizer_in_member_allClocks_core_1_reset | input | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_chipyard_prcictrl_domain_resetSynchronizer_in_member_allClocks_core_0_clock | input | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_chipyard_prcictrl_domain_resetSynchronizer_in_member_allClocks_core_0_reset | input | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_cbus_fixedClockNode_anon_out_clock | output | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_cbus_fixedClockNode_anon_out_reset | output | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_fbus_fixedClockNode_anon_out_clock | output | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
auto_sbus_fixedClockNode_anon_out_clock | output | | @[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25] |
resetctrl_hartResetReq_0 | output | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:63:25] |
resetctrl_hartResetReq_1 | output | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:63:25] |
resetctrl_hartResetReq_2 | output | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:63:25] |
resetctrl_hartResetReq_3 | output | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:63:25] |
resetctrl_hartIsInReset_0 | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:63:25] |
resetctrl_hartIsInReset_1 | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:63:25] |
resetctrl_hartIsInReset_2 | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:63:25] |
resetctrl_hartIsInReset_3 | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:63:25] |
debug_clock | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_reset | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_systemjtag_jtag_TCK | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_systemjtag_jtag_TMS | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_systemjtag_jtag_TDI | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_systemjtag_jtag_TDO_data | output | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_systemjtag_reset | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_systemjtag_mfr_id | input | [10:0] | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_systemjtag_part_number | input | [15:0] | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_systemjtag_version | input | [3:0] | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_dmactive | output | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
debug_dmactiveAck | input | | @[generators/chipyard/src/main/scala/tt_configs/TTPeriphery.scala:72:19] |
mmio_axi4_0_aw_ready | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_aw_valid | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_aw_bits_id | output | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_aw_bits_addr | output | [55:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_aw_bits_len | output | [7:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_aw_bits_size | output | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_aw_bits_burst | output | [1:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_aw_bits_lock | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_aw_bits_cache | output | [3:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_aw_bits_prot | output | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_aw_bits_qos | output | [3:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_w_ready | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_w_valid | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_w_bits_data | output | [63:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_w_bits_strb | output | [7:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_w_bits_last | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_b_ready | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_b_valid | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_b_bits_id | input | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_b_bits_resp | input | [1:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_ready | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_valid | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_bits_id | output | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_bits_addr | output | [55:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_bits_len | output | [7:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_bits_size | output | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_bits_burst | output | [1:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_bits_lock | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_bits_cache | output | [3:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_bits_prot | output | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_ar_bits_qos | output | [3:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_r_ready | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_r_valid | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_r_bits_id | input | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_r_bits_data | input | [63:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_r_bits_resp | input | [1:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
mmio_axi4_0_r_bits_last | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SinkNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_ready | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_valid | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_bits_id | input | [7:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_bits_addr | input | [55:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_bits_len | input | [7:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_bits_size | input | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_bits_burst | input | [1:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_bits_lock | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_bits_cache | input | [3:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_bits_prot | input | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_aw_bits_qos | input | [3:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_w_ready | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_w_valid | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_w_bits_data | input | [63:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_w_bits_strb | input | [7:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_w_bits_last | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_b_ready | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_b_valid | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_b_bits_id | output | [7:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_b_bits_resp | output | [1:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_ready | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_valid | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_bits_id | input | [7:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_bits_addr | input | [55:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_bits_len | input | [7:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_bits_size | input | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_bits_burst | input | [1:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_bits_lock | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_bits_cache | input | [3:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_bits_prot | input | [2:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_ar_bits_qos | input | [3:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_r_ready | input | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_r_valid | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_r_bits_id | output | [7:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_r_bits_data | output | [63:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_r_bits_resp | output | [1:0] | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
l2_frontend_bus_axi4_0_r_bits_last | output | | @[generators/diplomacy/diplomacy/src/diplomacy/nodes/SourceNode.scala:76:21] |
reset_vector_0 | input | [55:0] | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSource.scala:26:19] |
reset_vector_1 | input | [55:0] | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSource.scala:26:19] |
reset_vector_2 | input | [55:0] | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSource.scala:26:19] |
reset_vector_3 | input | [55:0] | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSource.scala:26:19] |
wdt_0_corerst | input | | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSink.scala:25:19] |
wdt_0_rst | output | | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSink.scala:25:19] |
wdt_1_corerst | input | | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSink.scala:25:19] |
wdt_1_rst | output | | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSink.scala:25:19] |
wdt_2_corerst | input | | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSink.scala:25:19] |
wdt_2_rst | output | | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSink.scala:25:19] |
wdt_3_corerst | input | | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSink.scala:25:19] |
wdt_3_rst | output | | @[generators/diplomacy/diplomacy/src/diplomacy/bundlebridge/BundleBridgeSink.scala:25:19] |
interrupts | input | [327:0] | @[generators/rocket-chip/src/main/scala/subsystem/InterruptBus.scala:80:22] |