sep_sram_interface_shim

Forward the SEP SRAM memory_interface struct onto an SRAM macro.

SRAM_ADDR_WIDTH defaults to 10 (1K 64-bit entries). Forwards read/write requests onto macro_* pins and returns macro_rdata_i when macro_rvalid_i. Every request is granted at once. Reads complete on macro_rvalid_i; writes are acknowledged with rvalid one cycle after the request.

Parameters

Table 1. Parameters
Name	Type	Default	Description
`SRAM_ADDR_WIDTH`	`int unsigned`	`10`	SRAM address width; default 10 for 1K entries.

Ports

Table 2. Ports
Name	Direction	Type	Description
`clk_i`	input	`logic`	System clock.
`rst_ni`	input	`logic`	Active-low reset.
`mem_req_i`	input	`sep_sram_req_t`	Memory request from the SEP memory_interface; byte address, 64-bit data.
`mem_rsp_o`	output	`sep_sram_rsp_t`	Memory response: gnt always high, rvalid from macro_rvalid_i for reads and one cycle after the request for writes.
`macro_req_o`	output	`logic`	Request to the SRAM macro, for reads and writes.
`macro_write_o`	output	`logic`	Write enable qualifying macro_req_o; low for reads.
`macro_addr_o`	output	`logic [SRAM_ADDR_WIDTH-1:0]`	SRAM word address: the request byte address divided by eight.
`macro_wdata_o`	output	`logic [SEP_MEM_DATA_WIDTH-1:0]`	Write data to the SRAM macro.
`macro_wmask_o`	output	`logic [SEP_MEM_DATA_WIDTH-1:0]`	Bit write mask, each request byte strobe expanded to eight bits.
`macro_rdata_i`	input	`logic [SEP_MEM_DATA_WIDTH-1:0]`	Read data from the SRAM macro; valid with macro_rvalid_i.
`macro_rvalid_i`	input	`logic`	Read-data valid from the SRAM macro.